For over 20 years, charge-coupled devices (CCDs) have dominated digital imaging applications and markets. State of the art CCDs exhibit very few performance deficiencies. A combination of near-ideal performance and implementation has made the CCD a highly successful imaging sensor. There are, however, specific fundamental weaknesses associated with this technology. First, it is difficult to design CCD imagers (also sometimes referred to as an array of image sensors) that operate well in high-energy radiation environments. Second, CCD imagers typically require significant external support electronics for operation. Third, high-speed readout of signal charges of the CCD imagers is difficult because signal charges, for the most part, must be readout in a serial fashion as opposed to parallel or random access pixel acquisition.
Because of the deficiencies in CCD imagers, complementary metal oxide semiconductor (CMOS) imagers (i.e., arrays of image sensors with accompanying interface electronics) are displacing CCD imagers in some imaging applications, and this trend is expected to continue. The CCD imager deficiencies listed above are main strengths for CMOS imagers. CMOS technology including CMOS imagers is considerably more tolerant to high-energy radiation environments. CMOS technology, inherently, allows on-chip system integration designs that reduce size, power, weight and cost of devices, for example, of cameras while increasing reliability and lifetime of the devices. Lastly, CMOS arrays can be designed to be read in a parallel, random access fashion while allowing high-speed operation and low noise performance of the CMOS arrays. Current CMOS technology, however, is lacking in nearly every performance category compared to CCD technology.
What is needed is a CMOS image sensor with improved performance.